Eis abaixo um código básico para comandar um dispositivo na porta B do joystick.
Uma desvantagem do protocolo SPI é necessitar de um sinal de Chip Select para cada dispositivo. Mas isso pode ser contornado, utilizando um duplo Flip-Flop, permitindo assim que uma cadeia de dispositivos seja conectada simultaneamente.
A velocidade de transmissão deve ser algo em torno de 1,7KBytes/segundo.
; Biblioteca SPI para a porta de Joystick do MSX
; Danjovic 2008 - danjovic@vespanet.com.br
; http://hotbit.blogspot.com
;
; Version: 0.1 : 18/02/2008
; Version: 0.2 : 22/02/2008 - Added 8 clock pulses after release of CS line.
; Caracteristicas:
; Modo 0 ->; CPOL=0, CPHA=0
; Sample in Rise, shift in Fall
;
; Pinout:
; MISO =>; 1 (UP)
; MOSI =>; 6 (TRGA)
; MSSL =>; 7 (TRGB)
; MSCK =>; 8 (PULSE)
;SPIUP - Init SPI port B
;SPIDW - Release SPI port
;SPITX - Transmit a byte
;SPIRX - Receive a byte
;SPIXF - Transfer a byte
; Bits do Registro 14 do PSG
;
BMISO EQU 1 ; UP
MSKSO EQU 0FEH
; Bits do Registro 15 do PSG
;
BMOSI EQU 2 ; TRG1
BMSSL EQU 3 ; TRG2
BMSCK EQU 5 ; PULSE
ABSEL EQU 6 ; A/B SELECT
; Registros do PSG
;
PSGAD EQU 0A0H
PSGWR EQU 0A1H
PSGRD EQU 0A2H
SPIUP: ; Initialize SPI Port
; Inputs: None
; Outputs: A - Reg 15 state
; Changes: A,EI
DI
LD A,15
OUT [PSGAD],A
IN A,[PSGRD]
LD [PSGSAV],A
SET ABSEL,A
RES BMSSL,A ; Chip Select low
OUT [PSGWR],A
RET
SPIDW: ; Release SPI Port
; Inputs: A - Reg 15 State
; Outputs: None
; Changes: A,EI
LD B,A ; Save Reg 15 State
; Release /CS line off
LD A,15
OUT [PSGAD],A
LD A,B
SET BMSSL,A
OUT [PSGWR],A
; Dummy RX - 8 clock pulses
SCF
CALL SPIRX
; Restore PSG reg 15 State
LD A,[PSGSAV]
OUT [PSGWR],A
EI
RET
SPITX: ; Transmit a byte
; Inputs: A - Reg 15 State
; C - Byte to transmit
; PSG Reg 15 already selected
; Outputs: None
; Changes: AF,B,C
LD B,8
TXBIT: RL C ; MSB -> CY Flag
SET BMOSI,A
JR C,TPUTB
RES BMOSI,A
TPUTB: OUT [PSGWR],A
; CLOCK()
SET BMSCK,A
OUT [PSGWR],A
RES BMSCK,A
OUT [PSGWR],A
;
DJNZ TXBIT
SPIRX: ; Receive a byte
; Inputs: A - Reg 15 State
; CY - MOSI line state while receiving
; PSG Reg 15 already selected
; Outputs: C - Byte received
; Changes: AF,B,C,D
; Set MOSI line state
SET BMOSI,A
JR C,RXHIGH
RES BMOSI,A
RXHIGH: OUT [PSGWR],A
LD B,8
RXBIT: ; CLOCK HI
SET BMSCK,A
OUT [PSGWR],A
LD D,A ; Save Reg 15 State
; Read bit
LD A,14
OUT [PSGAD],A
IN A,[PSGRD]
AND MSKSO
NEG ; Bit MSKSO->CY
RL C ; LSB<-CY
; CLOCK LO
LD A,15
OUT [PSGAD],A
LD A,D ; Restore Reg15 state
RES BMSCK,A
OUT [PSGWR],A
;
DJNZ RXBIT
SPIXF: ; Transfer a byte
; Inputs: A - Reg 15 State
; C - Byte to transmit
; PSG Reg 15 already selected
; Outputs: E - Byte received
; Changes: AF,B,C,D,E
LD B,8
XFBIT: ; Write bit
RL C ; MSB -> CY Flag
SET BMOSI,A
JR C,XFPUTB
RES BMOSI,A
XFPUTB: OUT [PSGWR],A
; CLOCK HI
SET BMSCK,A
OUT [PSGWR],A
LD D,A ; Save Reg 15 State
; Read bit
LD A,14
OUT [PSGAD],A
IN A,[PSGRD]
AND MSKSO
NEG ; Bit MSKSO->CY
RL E ; LSB<-CY
; CLOCK LO
LD A,15
OUT [PSGAD],A
LD A,D ; Restore Reg15 state
RES BMSCK,A
OUT [PSGWR],A
;
DJNZ XFBIT
